1. Field of the Invention
The present invention relates to an electronic component package and a manufacturing method thereof.
2. Background Art
Today's trend of the current electronic part industry shows that the number of input/output of chips has risen sharply, and the package is multifunctional and multiplex. Accordingly, a chip scale package that packages a chip scale as it is without using a solder and a solder bump of a flip chip ball grid array (BGA) has been developed.
FIG. 1A through 1K illustrate an electronic component package manufacturing method in accordance with a conventional art, and FIG. 2 is a sectional view showing an electronic component package in accordance with a convention art. As shown in FIG. 1 and FIG. 2, according to the electronic component package manufacturing method in accordance with the conventional art, a void may be generated in the process of molding a chip 1. Since the process of assembling a heat sink and lay-up process, for example, are performed after the chip 1 is molded in a flexible printed circuit board 2 by using a dam member 3 and an adhesive 4, the handling may be unstably performed.
Also, as shown in FIG. 2, the durability may be lowered due to allowing the heat sink 8 to be coupled to the dam member 3 by use of an adhesive 7, and the heat-emitting efficiency may be lowered due to the structure in which only one side surface of the electronic component 1 is arranged facing the heat sink 8.